| TruPVL0145 | High-Throughput Area-Efficient Processor for Cryptography |
| TruPVL0146 | A CMOS Ultra wideband Pulse Generator for 3–5 GHz Applications |
| TruPVL0147 | A Power-Efficient Reconfigurable Output-Capacitor-Less Low-Drop-Out Regulator for Low-Power Analog Sensing Front-End |
| TruPVL0148 | Analysis and Design of the Classical CMOS Schmitt Trigger in Subthreshold Operation |
| TruPVL0149 | 28-nm Latch-Type Sense Amplifier Modification for Coupling Suppression |
| TruPVL0150 | Low-Computing-Load, High-Parallelism Detection method based on Chebyshev Iteration for Massive MIMO Systems with VLSI Architecture |
| TruPVL0151 | Novel Radiation-Hardened-by-Design (RHBD)12T Memory Cell for Aerospace Applications in Nanoscale CMOS Technology |
| TruPVL0152 | VLSI Implementation of a Cost-Efficient Micro Control Unit With an Asymmetric Encryption for Wireless Body Sensor Networks |
| TruPVL0153 | Ultra-Low Power, Highly Reliable, and Nonvolatile Hybrid MTJ/CMOS Based Full-Adder for Future VLSI Design |
| TruPVL0154 | Reliability Enhancement of Low-Power Sequential Circuits Using Reconfigurable Pulsed Latches |
| TruPVL0155 | Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications |
| TruPVL0156 | Dual-Quality 4:2 Compressors for Utilizing in Dynamic Accuracy Configurable Multipliers |
| TruPVL0157 | Design of Power and Area Efficient Approximate Multipliers |
| TruPVL0158 | RoBA Multiplier: A Rounding-Based Approximate Multiplier for High- Speed yet Energy-Efficient Digital Signal Processing |
| TruPVL0159 | A Compact-Area Low-VDD min 6T SRAM With Improvement in Cell Stability, Read Speed, and Write Margin Using a Dual-Split-Control- Assist Scheme |
| TruPVL0160 | Stable, Reliable and Bit-Interleaving 12T SRAM for Space Applications: A Device Circuit Co-design |
| TruPVL0161 | Pre-Charged Local Bit-Line Sharing SRAM Architecture for Near- Threshold Operation Language: CMOS Design |
| TruPVL0162 | 10T SRAM Using Half-VDD Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage |
| TruPVL0163 | Content Addressable Memory—Early Predict and Terminate Precharge of Match-Line |
| TruPVL0164 | Modeling and Mitigation of Static Noise Margin Variation in Subthreshold SRAM Cells |
| TruPVL0165 | Designing RF Ring Oscillator using Current-mode Technology |
| TruPVL0166 | A Low-Energy Machine-Learning Classifier Based on Clocked Comparators for Direct Inference on Analog Sensors |
| TruPVL0167 | Single-Event Performance of Sense-Amplifier Based Flip-Flop Design in a 16-nm Bulk FinFET CMOS Process |
| TruPVL0168 | Design of Approximate Radix-4 Booth Multipliers for Error Tolerant Computing |
| TruPVL0169 | Design of Low-Voltage High-Speed CML D-Latches in Nanometer CMOS Technologies |
| TruPVL0170 | Low power-delay-product dynamic CMOS circuit design techniques |
| TruPVL0171 | A Power-Efficient Signal-Specific ADC for Sensor-Interface Applications |
| TruPVL0172 | OTA-Based Logarithmic Circuit for Arbitrary Input Signal and Its Application |
| TruPVL0173 | Low-Cost Sorting Network Circuits Using Unary Processing |
| TruPVL0174 | Algorithm and VLSI Architecture Design of Proportionate-Type LMS Adaptive Filters for Sparse System Identification |
| TruPVL0175 | Taming Spatiotemporal Chaos in Forced Memristive Array |
| TruPVL0176 | Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs |
| TruPVL0177 | A DfT Insertion Methodology to Scannable Q-Flop Elements |
| TruPVL0178 | A Dual-Data Line Read Scheme for High-Speed Low-Energy Resistive Nonvolatile Memories |
| TruPVL0179 | Single-Chip Design for Intelligent Surveillance System |
| TruPVL0180 | High-Density SOT-MRAM Based on Shared Bitline Structure |
| TruPVL0181 | A Changing-Reference Parasitic-Matching Sensing Circuit for 3-D Vertical RRAM |
| TruPVL0182 | Design and Analysis of Energy-Efficient and Reliable 3-D ReRAM Cross-Point Array System |
| TruPVL0183 | Stateful Memristor-Based Search Architecture |
| TruPVL0184 | Robust Design-for-Security Architecture for Enabling Trust in IC Manufacturing and Test |
| TruPVL0185 | DCMCS: Highly Robust Low-Power Differential Current-Mode Clocking and Synthesis |
| TruPVL0186 | Viewer-Aware Intelligent Efficient Mobile Video Embedded Memory |
| TruPVL0187 | Scalable Symbolic Simulation Based Automatic Correction of Modern Processors |
| TruPVL0188 | Configurable Logic Operations Using Hybrid CRS-CMOS Cells |
| TruPVL0189 | Thermal Management of Batteries Using Super capacitor Hybrid Architecture With Idle Period Insertion Strategy |
| TruPVL0190 | Three-Dimensional Pipeline ADC Utilizing TSV/Design Optimization and Memristor Ratioed Logic |
| TruPVL0191 | Energy- and Area-Efficient Spin–Orbit Torque Nonvolatile Flip-Flop for Power Gating Architecture |
| TruPVL0192 | Cascade and LC Ladder-Based Filter Realizations Using Synchronous Time- Mode Signal Processing |
| TruPVL0193 | Multilevel Half-Rate Phase Detector for Clock and Data Recovery Circuits |
| TruPVL0194 | Zero-Power Feed-Forward Spur Cancelation for Supply Regulated CMOS Ring PLLs |
| TruPVL0195 | Systematic Design of an Approximate Adder The Optimized Lower Part Constant- ORAdder |
| TruPVL0196 | A Framework for Enabling Fast Voltage Over scaling Simulation for Approximate Computing Circuits |
| TruPVL0197 | Vector Processing-Aware Advanced Clock-Gating Techniques for Low-Power Fused Multiply-Add |
| TruPVL0198 | On Synthesizing Memristor Base Logic Circuits With Minimal Operational Pulses |
| TruPVL0199 | Secure Double Rate Registers as an RTL Countermeasure Against Power Analysis Attacks |
| TruPVL0200 | Duty-Cycle-Based Controlled Physical Unclonable Function |
| TruPVL0201 | Improving Error Correction Codes for Multiple-Cell Upsets in Space Applications |
| TruPVL0202 | Toward an Energy Efficient High-Voltage Compliant Visual Intracortical Multichannel Stimulator |
| TruPVL0203 | Design Considerations for Energy-Efficient and Variation-Tolerant Nonvolatile Logic |
| TruPVL0204 | Stream Processing Dual-Track CGRA for Object Inference |
| TruPVL0205 | Toward Energy-Efficient Stochastic Circuits Using Parallel Sobol Sequences |
